FPGA

Capture FPGA status and recovery (core10_plus only)

This API allows querying the state of the capture FPGA and reprogramming it even when the FPGA is not visible on PCIe, so the user can recover a bricked or corrupted FPGA.

These endpoints are registered only on core10_plus.

API

• Get FPGA status:

  • Path: /api/system/fpga/status

  • Method: GET

  • Minimum user role: admin

  • Response:

    {
      "message": "Success",
      "data": {
        "pcie_link_up": true
      }
    }

    • pcie_link_up - boolean indicating whether the FPGA is currently visible on the PCIe bus
• Reprogram the FPGA bitstream:

  • Path: /api/system/fpga/reprogram

  • Method: POST

  • Minimum user role: admin

  • Request body: none.

  • Response on success:

    {
      "message": "Success",
      "data": "FPGA reprogram completed successfully. Device will reboot."
    }

  • Response on error:

    {
      "message": "<error description>",
      "data": { "status_code": 500 }
    }

Behaviour

The reprogram workflow is synchronous (~30s) and ends with a device reboot on success.

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